Automatic Saved on Power Outage
The controller automatically saves the first 50 Memory Words (%MW0 to %MW49) in the internal data flash following a power outage. The date is restored to the memory word region during the initialization, even if the controller performs a cold start due to a battery malfunction.
These automatically saved persistent variables are reinitialized in case of a new download, INIT command or %S0 activation.
Saved by User Request
You can save up to 2000 memory words (%MW50 up to %MW2049) in the flash memory. The number of words saved or restored is specified in the system word %SW148.
To perform the SAVE operation, set system bit %S93 to 1. The flash region is erased at the end of the MAST cycle. The operation exclusively occupies the controller for approximately 40 ms. The system bit %S92 is set to 1 to signal the end of operation.
The restore is performed by setting %S94 to 1. The restore operation is performed completely at the end of the MAST cycle.
Notes:
When the battery is present, all %M and %MW words are retained
If the battery is not present only the first %MW0 to %MW49 are retained, as mentioned above.. %M bits are not retained.
%MF and %MD registers overlap with %MW words and the ones that overlap with the retained registers will also be retained. For example %MF0 / % MD0 overlaps with %MW0 and %MW1, %MF1/ %MD1 overlaps with %MW1 and %MW2 and so on and so forth.
The controller automatically saves the first 50 Memory Words (%MW0 to %MW49) in the internal data flash following a power outage. The date is restored to the memory word region during the initialization, even if the controller performs a cold start due to a battery malfunction.
These automatically saved persistent variables are reinitialized in case of a new download, INIT command or %S0 activation.
Saved by User Request
You can save up to 2000 memory words (%MW50 up to %MW2049) in the flash memory. The number of words saved or restored is specified in the system word %SW148.
To perform the SAVE operation, set system bit %S93 to 1. The flash region is erased at the end of the MAST cycle. The operation exclusively occupies the controller for approximately 40 ms. The system bit %S92 is set to 1 to signal the end of operation.
The restore is performed by setting %S94 to 1. The restore operation is performed completely at the end of the MAST cycle.
Notes:
When the battery is present, all %M and %MW words are retained
If the battery is not present only the first %MW0 to %MW49 are retained, as mentioned above.. %M bits are not retained.
%MF and %MD registers overlap with %MW words and the ones that overlap with the retained registers will also be retained. For example %MF0 / % MD0 overlaps with %MW0 and %MW1, %MF1/ %MD1 overlaps with %MW1 and %MW2 and so on and so forth.
Released for:Schneider Electric Egypt and North East Africa
